Senior ASIC Design Engineer - Terawave

About this role

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!   

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

We are seeking a   ASIC/SOC   Design Validation   e ngineer s   (all levels including Senior, Principal, Senior Principal)   to   work in the Design Validation team who   are   critical to ensuring our RFIC/ASIC design s   culminate in thoroughly validated   cutting-edge integrated circuits that drive Blue Origin's mission of enabling millions to live and work in space for the benefit of Earth.  

Location:   This role is based   on   site   in San Diego, CA; Bay Area, CA;   Austin, TX; Kent, WA.  

This role requires a highly skilled verification engineer with extensive experience across the full spectrum of pre-silicon and post-silicon verification for complex SoC designs. The candidate will be responsible for driving verification methodologies, managing test planning and coverage closure, and ensuring seamless portability across multiple verification environments including emulation, FPGA, and silicon bring-up. Strong expertise in System Verilog, DSP structures, modem SOCs, and interface protocols is essential, along with the ability to integrate and verify complex IPs and support software co-simulation across all platforms.

Pre-Silicon • System Verilog experience in verifying complex SOCs • Formal verification • Functional coverage, definition and collection • Module verification • Complex subsystem verification • Complex SoC verification • Co-simulation with software, integration of software build tool flow with simulation • Test planning and tracking, coverage closure • Methodology and flow, definition and implementation • Power estimation • Gate simulation • Performance analysis • External IP integration • AXI bus complex • High performance NOC and DMA • DDR, PCIE, Ethernet, SPI • High speed SERDES • DSP structures (FIR, Cordic, FFT/IFFT, MAC, circular buffers, analog-digital interface) • Modern modem SOCs using innovative DSP, coding, framing (phy and MAC) • Sequenced and time bound data movement in DSP structures (time slots, time stamps etc.) • AMS verification • SOC top level verification using models for analog macros • Verification using golden reference models in MATLAB, SystemC or C • Code coverage • Emulators: qualification for release, compatibility of test cases, reproduce and debug failures, how to partition verification and assess coverage between this and simulation • Portable verification across block level and top level, FPGA and ASIC, rtl and gate, pre-silicon and silicon/prototyping (lab bringup and test): common method for configuring, stimulus, checking, reusability across environments, methods for doing this efficiently

Post-Silicon • Post silicon bring up • Support for post-silicon and FPGA in the same pre-silicon environment (portable bench/sim platforms). Compatibility of test cases, reproduce and debug failures, accelerate software development

FPGA • ASIC to/from FPGA flow • Prototyping: qualification for release, different design configurations and top levels, compatibility of test cases, reproduce and debug failures, accelerate software development, how to partition verification and assess coverage between this and simulation

Minimum Qualifications: • BS, MS in Electrical Engineering or a related technical field. • 8+ years of experience. • Deep working knowledge and hands on experience in innovative verification flows.

  Base Pay Range for: CA applicants is $230,398.00 - $322,556.85
WA applicants is $230,398.00 - $322,556.85 Other site ranges may differ

Culture Statement Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.

Export Control Regulations Applicants for employment at Blue Origin must be a U.S. citizen or national, U.S. permanent resident (i.e. current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Background Check • Required for all positions: Blue’s Standard Background Check

• Required for Certain Job Profiles:  Defense Biometric Identification System (DBIDS) background check if at any time the role requires one to be on a military installation

• Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs. and/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing (CDL drivers only), vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping tr

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