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Senior FPGA Design & Verification Engineer – TeraWave

Blue Origin

Greater Seattle Area | Reston, VA | Bay Area, US$157k – $220konsite

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About this role

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!   

Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide.

Overview  

Blue Origin is seeking a Senior FPGA Design and Verification Engineer to develop the digital signal processing and physical layer implementation for the   Terawave   next generation   m odem. In this role, you will architect, design, implement, and verify FPGA-based modem and physical layer solutions that enable robust, high-reliability communications for our spacecraft and ground systems.  

U sing latest generation hardware and modern design methodologies , y ou will work across the full development lifecycle   –   from architecture and algorithm mapping through implementation, verification, and hardware bring-up   –   collaborating closely with systems, DSP/communications, RF, and avionics engineering teams.  

Responsibilities  

• Architect and design FPGA implementations of modem and physical layer functions on a SoC FPGA platform.  

• Translate communications system and DSP algorithm requirements into efficient, resource-optimized RTL (VHDL/Verilog/ SystemVerilog ).  

• Develop and execute comprehensive verification strategies, including self-checking testbenches, constrained-random verification, and coverage-driven methodologies (e.g., UVM).  

• Perform timing closure, resource optimization, and design implementation for high-performance FPGA and system-on-chip (SoC) platforms.  

• Support integration and hardware bring-up, including lab testing, debug, and validation against system-level performance requirements.  

• Collaborate with DSP/communications engineers to co-design and optimize physical layer algorithms for fixed-point FPGA implementation.  

• Contribute to design reviews, documentation, and design-for-test/design-for-reliability practices consistent with aerospace-grade development.  

• Support radiation-tolerant and high-reliability design considerations for space-based applications.  

Minimum Qualifications  

• Bachelor's degree or above in   E lectrical   E ngineering,   C omputer   E ngineering, or equivalent .  

• 7+ years of experience in FPGA design and verification.  

• Strong proficiency in RTL design using VHDL and/or Verilog/ SystemVerilog .  

• Experience implementing DSP or communications/modem functions in FPGAs (e.g., modulation/demodulation, FEC, filtering, digital   front-ends ).  

• Proficiency with FPGA development toolchains (e.g., Xilinx/AMD   or   Inte l/Altera ) and simulation tools.  

• Experience with verification methodologies including self-checking testbenches and functional coverage.  

• Strong understanding of timing analysis, constraints, and timing closure.  

Preferred Qualifications  

• Background in digital communications theory and physical layer design (synchronization, equalization, carrier/timing recovery, link budgets) .  

• Experience with system-on-chip (SoC) platforms integrating FPGA fabric and embedded processors .  

• Experience in embedded development in C/C++, or experience writing low level drivers .  

• Experience developing test venue software and hardware infrastructure for hardware-in-the-loop (HIL) testing environment .  

  Base Pay Range for: CA applicants is $156,802.00 - $219,522.45
VA applicants is $156,802.00 - $219,522.45
WA applicants is $156,802.00 - $219,522.45 Other site ranges may differ

Culture Statement Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles.

Export Control Regulations Applicants for employment at Blue Origin must be a U.S. citizen or national, U.S. permanent resident (i.e. current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Background Check • Required for all positions: Blue’s Standard Background Check • Required for Certain Job Profiles:  Defense Biometric Identification System (DBIDS) background check if at any time the role requires one to be on a military installation • Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs. and/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. • Required for certain Job Profiles: Ability to obtain and maintain Merchant Mariner Credential, which includes pre-employment and random drug testing as well as DOT physical

Benefits • Benefits incl

Salary insight

The midpoint of this range ($188k) is about 6% below the median disclosed salary for San Francisco roles listed on ForgeApply ($201k across 6,700 jobs).

Based on live postings with disclosed pay on ForgeApply; refreshed daily. Not an estimate of this employer's offer.

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