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Hardware Post-Silicon Validation Engineer (Hybrid)

Cisco

San Jose, CA, US$155k – $223konsite

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About this role

The application window is expected to close on: 09/24/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received .

This position requires that you live within commuting distance of our San Jose, CA office and commute to the office at least 4-5 days per week. 

Meet the Team The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world. 

Welcome to the Post-Silicon Validation Team at Cisco! Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. 

Operating at the forefront of technology, we work with cutting-edge, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, leveraging our expertise to impact the future of networking technology. With a commitment to excellence and a passion transformative technology, we are shaping the future of high-performance Networking and delivering unparalleled value in every project we undertake. Join us and be a part of a team where professionalism meets impact.

Your Impact

We are seeking a Hardware Post-Silicon Validation Engineer with experience in lab-intensive hardware validation to test and debug of high-performance networking silicon. This role is heavily focused on hands-on work in silicon validation labs, driving early-silicon bring-up, performing advanced electrical and protocol measurements, and owning end-to-end root-cause analysis of silicon, package, and board-level issues. The position offers technical ownership, cross-functional influence, and exposure to complex networking ASICs and high-speed interfaces.  • Work on early-silicon bring-up activities from first power-on through feature enablement 

• Define, execute, and refine detailed hardware validation plans covering functionality characterization, performance, and reliability 

• Drive validation readiness, lab infrastructure setup, and test coverage strategy 

• Support power-on sequencing, reset strategy validation, clock bring-up, and strap configuration 

• Perform in-depth voltage, current, power integrity (PDN), and signal integrity analysis 

• Capture, analyze, and interpret waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise. 

• Independently isolate and root-cause silicon, package, board, or signal integrity issues 

• Work on validation of Ethernet MAC/PHY and high-speed interfaces such as PCIe and SerDes 

• Responsible for packet-level validation using traffic generators and protocol analyzers 

• Validate system-level behavior under real-world networking workloads 

• Advanced-level operation of oscilloscopes, logic analyzers, VNAs, protocol analyzers, BERTs, and multimeters 

• Develop and maintain lab automation using scripts and frameworks (e.g., Python) 

• Plan and execute thermal testing using chambers and chillers across operating ranges 

Minimum Qualifications • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 4+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or Master's degree in Electrical Engineering, Computer Engineering, or related field and 2+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or PhD in Electrical Engineering, Computer Engineering, or related field and 0+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug. 

• Experience in electronics, digital logic, signal integrity, and power integrity 

• Experience in high-speed measurement techniques (eye diagrams, BER, jitter, compliance testing) 

• Experience with interfaces such as DDR5, USB 3.x, SGMII, PCIe, USB2.0, eMMC, SPI, MDIO, I2C, and UART 

• Experience with Reading and Reviewing schematics and layout files for complex boards 

Preferred Qualifications  • Experience working independently, lead, plan and execute lab-based debug efforts 

• Hands-on experience with silicon bring-up and post-silicon validation labs 

• Experience validating Ethernet, PCIe, and SerDes interfaces 

• Scripting skills for lab automation and data analysis (Python preferred) 

• Understanding of networking fundamentals and packet-based systems 

Why Cisco?  At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.  We are Cisco, and our power starts with you. 

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The midpoint of this range ($189k) is about 6% below the median disclosed salary for San Francisco roles listed on ForgeApply ($200k across 8,851 jobs).

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