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Senior Hardware Post-Silicon Validation Engineer (Hybrid)
Cisco
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About this role
The application window is expected to close on: 09/30/2026 Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received .
This position requires that you live within commuting distance of our San Jose, CA office and commute to the office at least 4-5 days per week.
Meet the Team The Common Hardware Group (CHG) creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms—like Silicon One—are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.
Cisco Silicon One (#CiscoSiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world’s most complex networks and carry over 90% of IP traffic. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio.
Welcome to the Post-Silicon Validation Team at Cisco! Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle.
Operating at the forefront of technology, we work with cutting-edge, high-speed, and power-hungry devices. Our small, but highly influential team thrives in this challenging environment, leveraging our expertise to impact the future of networking technology. With a commitment to excellence and a passion transformative technology, we are shaping the future of high-performance Networking and delivering unparalleled value in every project we undertake. Join us and be a part of a team where professionalism meets impact.
Your Impact
We are seeking a Hardware Post-Silicon Validation Engineer with deep expertise in lab-intensive hardware validation to test and debug of high-performance networking silicon. This role is heavily focused on hands-on work in silicon validation labs, driving early-silicon bring-up, performing advanced electrical and protocol measurements, and owning end-to-end root-cause analysis of silicon, package, and board-level issues. The position offers significant technical ownership, cross-functional influence, and exposure to complex networking ASICs and high-speed interfaces.
Key Responsibilities • Lead hands-on post-silicon electrical validation in lab environments for networking ASICs and evaluation platforms
• Own early-silicon bring-up activities from first power-on through feature enablement
• Define, execute, and refine detailed hardware validation plans covering functionality characterization, performance, and reliability
• Drive validation readiness, lab infrastructure setup, and test coverage strategy
• Lead power-on sequencing, reset strategy validation, clock bring-up, and strap configuration
• Perform in-depth voltage, current, power integrity (PDN), and signal integrity analysis
• Capture, analyze, and interpret waveforms, eye diagrams, jitter, BER, PDN measurements, power supply stability and noise.
• Independently isolate and root-cause silicon, package, board, or signal integrity issues
• Lead validation of Ethernet MAC/PHY and high-speed interfaces such as PCIe and SerDes
• Oversee packet-level validation using traffic generators and protocol analyzers
• Validate system-level behavior under real-world networking workloads
• Advanced-level operation of oscilloscopes, logic analyzers, VNAs, protocol analyzers, BERTs, and multimeters
• Develop and maintain lab automation using scripts and frameworks (e.g., Python)
• Plan and execute thermal testing using chambers and chillers across operating ranges
Minimum Qualifications • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 6+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or Master's degree in Electrical Engineering, Computer Engineering, or related field and 3+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug, or PhD in Electrical Engineering, Computer Engineering, or related field and 1+ years of experience in post-silicon electrical validation, hardware bring-up and lab-based silicon debug.
• Experience in electronics, digital logic, signal integrity, and power integrity
• Experience in high-speed measurement techniques (eye diagrams, BER, jitter, compliance testing)
• Experience with interfaces such as DDR5, USB 3.x, SGMII, PCIe, USB2.0, eMMC, SPI, MDIO, I2C, and UART
• Experience with Reading and Reviewing schematics and layout files for complex boards
Preferred Qualifications • Experience working independently, lead, plan and execute lab-based debug efforts
• Hands-on experience with silicon bring-up and post-silicon validation labs
• Experience validating Ethernet, PCIe, and SerDes interfaces
• Scripting skills for lab automation and data analysis (Python preferred)
• Understanding of networking fundamentals and packet-based systems
Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fear
Salary insight
The midpoint of this range ($206k) is right around the median disclosed salary for San Francisco roles listed on ForgeApply ($201k across 6,700 jobs).
See full Hardware Engineer salary data for San Francisco →
Based on live postings with disclosed pay on ForgeApply; refreshed daily. Not an estimate of this employer's offer.
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