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Software Validation Engineer

Altera

San Jose, California, US$133k – $193konsite

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About this role

Job Details:

Job Description: Altera is seeking a motivated Software Validation Engineer to ensure the quality and reliability of our cutting-edge software solutions for programmable logic devices!

Responsibilities: • Design, develop, review and execute comprehensive test plans and test cases for Quartus Software Design Suite.

• Automate testing processes using scripting languages (e.g., Python, Perl, TCL and Bash) and established testing frameworks.

• Collaborate closely with software development, hardware design, and applications engineering teams to understand product requirements and ensure testability.

• Analyze test results, generate reports, and present findings to stakeholders. Identify, document, and track software defects using bug tracking systems.

• Contribute to the continuous improvement of validation processes and methodologies.

• Stay current with industry best practices in software testing and validation.

  The pay range below is for Bay Area California only. Actual salary may vary based on   a number of   factors including job location, job-related knowledge, skills, experiences,   trainings , etc. We also offer incentive opportunities that reward employees based on individual and company performance.   

$ 133.2K   - $ 192.8K   USD  

We use artificial intelligence to screen, assess, or select applicants for the position.   Applicants must be eligible for any required U.S. export authorizations .  

Qualifications: • Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field.

• Working knowledge of FPGA software flows (e.g., Quartus, Vivado, Lattice) is a plus.

• 3+ years of experience in software validation, quality assurance, or testing.

• Strong understanding of software development life cycles (SDLC) and various testing methodologies.

• Proficiency in scripting languages (e.g., Python, Perl, Tcl and Bash).

• Experience with defect tracking systems (e.g., Jira, Bugzilla) and version control systems (e.g., Git, Perforce).

• Knowledge of hardware description languages (Verilog/VHDL) and FPGA design flows and System Verilog is a plus.

• Experience with embedded systems, operating systems (Linux/Windows), and device drivers is a plus.

• Excellent problem-solving and debugging skills and attention to detail.

• Strong written and verbal communication skills.

• Ability to work independently and as part of a collaborative team.

• Knowledge about protocols like PCIE, Ethernet, Memory, and AXI4 interface is desired.

• Use GUI Automation and AI for effective testcase creation and test analysis.

Job Type: Regular

Shift: Shift 1 (United States of America)

Primary Location: San Jose, California, United States

Additional Locations:

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Salary insight

The midpoint of this range ($163k) is about 19% below the median disclosed salary for San Francisco roles listed on ForgeApply ($200k across 6,783 jobs).

Based on live postings with disclosed pay on ForgeApply; refreshed daily. Not an estimate of this employer's offer.

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