Photonic Layout Engineer

About this role

About IonQ:

IonQ, Inc . [NYSE: IONQ] is the world’s leading quantum platform and merchant supplier - delivering integrated quantum solutions across computing, networking, sensing, and security. IonQ’s newest generation of quantum computers, the IonQ Tempo, is the latest in a line of cutting-edge systems that have been helping customers and partners including Amazon Web Services, and AstraZeneca achieve 20x performance results and accelerate innovation in drug discovery, materials science, financial modeling, logistics, cybersecurity, and defense. In 2025, the company achieved 99.99% two-qubit gate fidelity, setting a world record in quantum computing performance .

Headquartered in College Park, Maryland, IonQ has operations in California, Colorado, Massachusetts, Tennessee, Washington, Italy, South Korea, Sweden, Switzerland, Canada, and the United Kingdom. Our quantum computing services are available through all major cloud providers, while we also meet the needs of networking and sensing customers across land, sea, air, and space. IonQ is making quantum platforms more accessible and impactful than ever before.

What to expect:

We are looking for a Photonic Layout Engineer to join our QPU Design team at Oxford Ionics/IonQ. In this role, you will be responsible for the layout of photonic integrated circuits (PICs) that form a central part of our Quantum Processor Units (QPUs), the novel technology that sit at the heart of our quantum computers and contributes to the team’s mission of advancing the design of these high-performance chip. You will work closely with scientists, photonic design engineers and fabrication engineers to bring new designs for ion trapping chips into production.

You’ll play an important part in shaping the hardware that supports our work in building the world’s most advanced quantum systems.

What you'll be responsible for:

In this position, you will work on integrating photonic components into complex multi-layer chips. This work will support the effective delivery of devices that make use of on-chip light delivery to allow scaling to thousands of qubits and beyond. You will have the opportunity to accelerate the tape-out of new chips and drive the design workflow of integrated photonics, contributing directly to the success of building utility-scale quantum computers.

You will be responsible for arranging and routing photonic components on the chip, in coordination with the metal track and CMOS routing. You will produce reticle-size photonic layout files using Python scripts as part of tape-out of the full chip, suitable for use in a commercial foundry.

Key responsibilities include:

• Collaborating with scientists to discuss their requirements.

• Interfacing with photonic designers, test engineers, packaging engineers and fabrication engineers to define design rules and shape component design.

• Layout verification through DRC and LVS.

• Contributing to custom layout Process Design Kits (PDKs) that are specific to IonQ and the foundry.

• Documenting the layout process and the final tape-out mask files.

Requirements

To be successful in this role you will need significant experience in the design and layout of Photonic Integrated Circuits (PICs). We are looking for someone who can consider requirements and constraints from other parts of the chip in the layout process, understand the purposes of different photonic components, enjoys complex layout work and can contribute effectively within a fast moving, highly technical team.

You'd be a great fit with:

• Proficiency in Photonic Integrated Circuit layouts.

• Familiarity with the principles of photonic devices, such as waveguides, beamsplitters, grating couplers or similar, including design, test and fabrication.

• At lest 2 years of experience working with Python software packages, specifically for photonic mask layout, such as Luceda IPKISS, GDSFactory or Klayout.

• A degree in Photonics, Physics, Electrical Engineering or a related field, or equivalent industry experience.

• Strong collaboration and communication skills, and the ability to work independently and prioritise tasks in a time-sensitive environment.

Other experience that would be beneficial includes experience in generating layout files for photonic devices or complex semiconductor devices, particularly with custom elements. Knowledge of the manufacturing processes and techniques in these two fields would also be helpful. A background in commercial simulation, verification and layout environments such as Synopsys, Cadence or Ansys is desirable. Strong programming and software skills would also be an asset in this role.

Benefits

Be part of a team that’s shaping the future of quantum. We offer more than just a role, you’ll join a world class community of scientists, engineers and innovators working to unlock the full potential of quantum computing.

We offer a range of benefits, including opportunities to further your career alongside industry leaders, a competitive salary with IonQ stock options, an annual performance bonus, generous annual leave, flexible hybrid working, private medical and dental insurance for you and your family, and much more.

Join us and be part of the future of quantum computing.

We’re proud to be an equal opportunity employer and welcome applicants from all backgrounds.

Compensation will vary based on individual factors such as education, qualifications, and experience of the final candidate(s), specific office location, and calibration against relevant market data and internal team equity. Posted base salary figures are subject to change as new market data becomes available. Our benefits include comprehensive medical, dental, and vision plans, matching 401(k), unlimited PTO and paid holidays, parental/adoption leave, legal insurance, and a home technology stipend. Details of participation in these benefit plans will be provided when a candidate receives an offer of employment.

At IonQ, we believe in f

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