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EDA Technical Program Manager

Altera

San Jose, CA, US$167k – $241konsite

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Job Details:

Job Description: About Altera At Altera™, our independence as the world’s largest pure ‑ play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry ‑ leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely—empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role We are seeking a highly experienced Senior EDA Physical Design Technical Program Manager to lead complex, high-impact technical programs across our Physical Design, EDA, CAD, and semiconductor engineering organizations. This role will operate at a senior level, partnering directly with engineering leadership, architects, software developers, physical design engineers, CAD/EDA teams, product teams, and other cross-functional stakeholders to drive execution of strategic initiatives supporting next-generation FPGA technologies and design automation solutions.

The Senior EDA TPM will have broad ownership of programs spanning multiple engineering organizations and will be responsible for driving programs from strategy and definition through execution, delivery, and operationalization . This individual will establish program structure, define execution strategies, identify critical dependencies, manage technical and organizational risks, and ensure alignment across teams with competing priorities.

The ideal candidate brings a strong combination of technical program management leadership, semiconductor/EDA domain expertise, and demonstrated experience leading large, highly complex engineering programs . The ability to understand technical challenges, anticipate execution risks, influence senior engineering leaders, and drive decisions without direct authority is essential. This role requires a high degree of autonomy and leadership. The successful candidate will serve as a trusted program partner to senior engineering leadership, provide executive-level visibility into strategic programs, and proactively identify opportunities to improve organizational execution, processes, and engineering efficiency.

Responsibilities • Lead end-to-end execution of highly complex, strategic technical programs supporting EDA, Physical Design, CAD, semiconductor development, and next-generation FPGA technologies.

• Own program strategy, scope, objectives, success criteria, execution plans, milestones, dependencies, and delivery commitments across multiple engineering organizations.

• Partner closely with senior engineering leaders and architects to translate business and technical objectives into executable program strategies and roadmaps.

• Drive cross-functional execution across Physical Design, CAD/EDA, Software Engineering, Architecture, RTL Design, Verification, Validation, Product Engineering, and other engineering organizations .

• Lead programs involving significant technical complexity, organizational dependencies, resource constraints, evolving requirements, and competing priorities.

• Establish and maintain integrated program plans encompassing schedules, milestones, critical paths, dependencies, resource requirements, deliverables, and risk mitigation strategies.

• Identify critical technical and organizational risks early, develop mitigation strategies, and drive issues to resolution with appropriate stakeholders and leadership.

• Proactively identify cross-program dependencies and potential execution conflicts, driving alignment and prioritization across engineering organizations.

• Establish program operating mechanisms, including executive reviews, engineering checkpoints, milestone reviews, dashboards, metrics, escalation paths, and decision-making forums.

• Develop executive-level reporting and communication that clearly articulates program health, accomplishments, risks, dependencies, resource constraints, decisions required, and recovery plans.

• Present program status and recommendations to senior engineering leadership and executive stakeholders, including clear escalation of issues requiring leadership decisions.

• Influence senior technical stakeholders and engineering leaders without direct authority to drive alignment, accountability, and timely execution.

• Facilitate resolution of complex technical and organizational issues by bringing the appropriate stakeholders together, driving data-based decisions, and maintaining momentum toward program objectives.

• Partner with engineering management to assess resource requirements, staffing constraints, technical priorities, and tradeoffs necessary to meet program commitments.

• Drive prioritization and sequencing decisions across multiple engineering teams when resource or schedule constraints create competing priorities.

• Develop and maintain multi-quarter and/or multi-year technical roadmaps for strategic EDA and Physical Design initiatives in partnership with engineering leadership.

• Coordinate major technology transitions, methodology changes, tool deployments, infrastructure initiatives, and engineering process improvements across distributed organizations.

• Apply strong understanding of semiconductor development and Physical Design methodologies to identify technical dependencies, anticipate execution challenges, and effectively communicate with engineering teams.

• Drive programs involving EDA tool flows, design methodologies, physical implementation, timing closure, design automation, infrastructure, and engineering productivity.

• Establish program-level metrics and operational mechanisms to measure execution effectiveness, identify trends, and improve predictability.

• Drive continuous improvement of program management practices, engineering processes, and organiza

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The midpoint of this range ($204k) is right around the median disclosed salary for San Francisco roles listed on ForgeApply ($200k across 8,498 jobs).

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